[PW_SID:1056004] dmaengine: sf-pdma: critical fixes and FU740 support#1483
[PW_SID:1056004] dmaengine: sf-pdma: critical fixes and FU740 support#1483linux-riscv-bot wants to merge 5 commits intoworkflow__riscv__fixesfrom
Conversation
…ions
The PDMA control registers start at offset 0x80000 from the PDMA base
address, according to the FU540-C000 v1p1 manual [1].
The current SF_PDMA_REG_BASE macro is missing this offset:
Current: pdma->membase + (PDMA_CHAN_OFFSET * ch)
Correct: pdma->membase + 0x80000 + (PDMA_CHAN_OFFSET * ch)
Fix by adding PDMA_BASE_OFFSET (0x80000) to the register address
calculation.
Link: https://www.sifive.com/document-file/freedom-u540-c000-manual [1]
Fixes: 6973886 ("dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00")
Signed-off-by: Max Hsu <max.hsu@sifive.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
According to the FU540-C000 v1p5 [1] and FU740-C000 v1p7 [2] specs, when a DMA transaction error occurs, the hardware sets both the DONE and ERROR interrupt bits simultaneously. On SMP systems, this can cause the done_isr and err_isr to execute concurrently on different CPUs, leading to race conditions and NULL pointer dereferences. Fix by: - In done_isr: abort if ERROR bit is set or DONE bit was already cleared - In err_isr: clear both DONE and ERROR bits to prevent done_isr from processing the same transaction Link: https://www.sifive.com/document-file/freedom-u540-c000-manual [1] Link: https://www.sifive.com/document-file/freedom-u740-c000-manual [2] Fixes: 6973886 ("dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00") Cc: stable@vger.kernel.org Signed-off-by: Max Hsu <max.hsu@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
…ndlers Fix NULL pointer dereferences in both the error and done tasklets that can occur due to race conditions during channel termination or completion. Both tasklets (sf_pdma_errbh_tasklet and sf_pdma_donebh_tasklet) dereference chan->desc without checking if it's NULL. However, chan->desc can be NULL in legitimate scenarios: 1. During sf_pdma_terminate_all(): The function sets chan->desc = NULL while holding vchan.lock, but interrupts for previously submitted transactions could fire after the lock is released, before the hardware is fully quiesced. These interrupts can schedule tasklets that will run with chan->desc = NULL. 2. During channel cleanup: Similar race condition during sf_pdma_free_chan_resources(). The fix adds NULL checks at the beginning of both tasklets, protected by vchan.lock, using the same lock that terminate_all and free_chan_resources use when setting chan->desc = NULL. This ensures that either: - The descriptor is valid and we can safely process it, or - The descriptor was already freed and we safely skip processing Fixes: 6973886 ("dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00") Cc: stable@vger.kernel.org Signed-off-by: Max Hsu <max.hsu@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
Add "sifive,fu740-c000-pdma" compatible string. Signed-off-by: Max Hsu <max.hsu@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The FU740 SoC includes a 4-channel Platform DMA (PDMA) controller. Add the device node to enable DMA support. Signed-off-by: Max Hsu <max.hsu@sifive.com> Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 1: "[1/5] dmaengine: sf-pdma: add missing PDMA base offset to register calculations" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 2: "[2/5] dmaengine: sf-pdma: fix race between done and error interrupts" |
|
Patch 3: "[3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers" |
|
Patch 3: "[3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers" |
|
Patch 3: "[3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers" |
|
Patch 3: "[3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers" |
|
Patch 3: "[3/5] dmaengine: sf-pdma: fix NULL pointer dereference in error and done handlers" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 4: "[4/5] dt-bindings: dma: sifive,fu540-c000-pdma: add fu740 support" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
|
Patch 5: "[5/5] riscv: dts: sifive: fu740: add PDMA device node" |
2 participants
PR for series 1056004 applied to workflow__riscv__fixes
Name: dmaengine: sf-pdma: critical fixes and FU740 support
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1056004
Version: 1